Integration of ultra low thermal budget CVD dielectrics in 65 NM MOS devices

1. Morin, P.
2. Rossato, C.
3. Martinez, E.
4. Denis, E.
5. Judong, F.
6. Gouraud, P.
7. Wacquant, F.
8. Bicais, N.
9. Juhel, M.
10. Duriez, B.
11. Woo, M.
12. Arnaud, F.